Debugger for Altera FPGAs with ARM cores

Altera and ARM have developed a development tool for debugging Altera FPGAs which contain hard ARM cores. It will be included in the Altera SoC Embedded Design suite due early next year.

“It’s a unique collaboration between ARM and Altera to overcome the challenges of debugging complex SOC,” says ARM vp John Cornish.

The tool is for 28nm Cyclone V and Arria V and for upcoming 20nm Altera/ARM parts.

“We have over a dozen customer committs for this product,” says Altera vp Chris Balough, “all the discussions are done and the price negotiations completed.” The price is a “shockingly good price point”, says Balough – a “negotiable” $1000.

The tool is designed to remove the debugging barrier between the integrated dual-core CPU subsystem and FPGA fabric in Altera SOC devices. ‘Altera SOC’ is a term which means Altera FPGAs which contain hard ARM cores in them.

‘By combining the most advanced multi-core debugger for the ARM architecture with the ability to adapt to the logic contained in the FPGA, the new toolkit provides embedded software developers an unprecedented level of full-chip visibility and control through the standard DS-5 user interface,’ says Altera.

Altera SOC devices combine a dual-core ARM Cortex-A9 processor with FPGA logic on a single device.. Altera is currently shipping initial samples of its Cyclone V SoC devices.

“This technical innovation has unified CPU debugging with FPGA debugging to bolster user productivity.,” says ARM’s Cornish, “Altera and ARM have made this advanced tool technology with premium, productivity-boosting features widely available through Altera SOC development kits and the Altera SoC Embedded Design Suite.”